摘要 |
<p>A method includes forming a first gate dielectric layer (26) over a semiconductor layer (13) having a first and a second well region (16, 18), forming a first metal gate electrode layer (28) over the first gate dielectric, forming a sidewall protection layer (36) over the first metal gate electrode layer and adjacent sidewalls of the first gate dielectric layer and first metal gate electrode layer, forming a channel region layer (40) over the second well region, forming a second gate dielectric layer (42) over the channel region layer, forming a second metal gate electrode layer (44), and forming a first gate stack (58) including a portion of each of the first gate dielectric layer and first metal gate electrode layer over the first well region and forming a second gate stack (66) including a portion of each of the second gate dielectric layer and second metal gate electrode layer over the channel region layer and over the second well region.</p> |
申请人 |
FREESCALE SEMICONDUCTOR INC.;KARVE, GAURI, V.;CAPASSO, CRISTIANO;SAMAVEDAM, SRIKANTH, B.;SCHAEFFER, JAMES, K.;TAYLOR, WILLIAM, J. |
发明人 |
KARVE, GAURI, V.;CAPASSO, CRISTIANO;SAMAVEDAM, SRIKANTH, B.;SCHAEFFER, JAMES, K.;TAYLOR, WILLIAM, J. |