发明名称 |
Oscillation circuit and phase synchronization circuit |
摘要 |
An oscillation circuit includes a ring oscillator and a current generating circuit. The ring oscillator includes a control terminal. The current generating circuit generates a current according to a voltage of the control terminal in the ring oscillator, and supplies the current to the control terminal. The ring oscillator includes a plurality of delay stages connected to each other in a ring shape. Each of the delay stages includes an inverter and a capacitance element. The inverter includes a power source side node, an input node, and an output node. The power source side node is connected to the control terminal. The capacitance element is connected as a load for the inverter. The capacitance value of the capacitance element is larger than a parasitic capacitance at the output node. |
申请公布号 |
US9509289(B2) |
申请公布日期 |
2016.11.29 |
申请号 |
US201514636009 |
申请日期 |
2015.03.02 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Kobayashi Hiroyuki |
分类号 |
H03K3/03;H03L1/02;H03L7/099;H03K3/011 |
主分类号 |
H03K3/03 |
代理机构 |
Patterson & Sheridan, LLP |
代理人 |
Patterson & Sheridan, LLP |
主权项 |
1. An oscillation circuit comprising:
a ring oscillator having a control terminal, an oscillation frequency of the ring oscillator being controllable by a drive current supplied to the control terminal; and a current generating circuit configured to adjust the drive current to a level corresponding to a voltage of the control terminal and supply the drive current to the control terminal, wherein the ring oscillator includes at least three delay elements connected in a ring shape, wherein each delay element includes:
an inverter having a power source side node connected to the control terminal, an input node, and an output node; anda capacitance element connected to the output node of the inverter and having a capacitance larger than a parasitic capacitance of the inverter at the output node, wherein the input node of the inverter in each delay element is connected to the output node of the inverter in a different delay element, wherein the current generating circuit includes a current setting resistor and the drive current is controlled to be proportional to a voltage across the current setting resistor, wherein the current generating circuit further includes:
a compensation current generating section configured to generate a compensation current that is equivalent to a leakage current which does not contribute to oscillation in the ring oscillator; anda current generating section configured to generate the drive current by adding the compensating current to a current proportional to the voltage across the current setting resistor, wherein each inverter includes a first PMOS transistor and a first NMOS transistor, and wherein the compensation current generating section includes:
a second PMOS transistor that corresponds in operational characteristics to the first PMOS transistor;a second NMOS transistor that corresponds in operational characteristics to the first NMOS transistor;a third PMOS transistor that corresponds in operational characteristics to the first PMOS transistor; anda third NMOS transistor that corresponds in operational characteristics to the first NMOS transistor. |
地址 |
Tokyo JP |