| 发明名称 |
LOW READ CURRENT ARCHITECTURE FOR MEMORY |
| 摘要 |
A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage differential between a memory state and a reference level is assured. |
| 申请公布号 |
US2016372189(A1) |
申请公布日期 |
2016.12.22 |
| 申请号 |
US201615181009 |
申请日期 |
2016.06.13 |
| 申请人 |
UNITY SEMICONDUCTOR CORPORATION |
发明人 |
Bateman Bruce Lynn;Chevallier Christophe;Rinerson Darrell;Siau Chang Hua |
| 分类号 |
G11C13/00 |
主分类号 |
G11C13/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. (canceled) |
| 地址 |
Sunnyvale CA US |
