CLOCK SYNCHRONIZATION CIRCUIT

摘要

The receiver clock of an asynchronous half-duplex data link in a call concentrator is initiated and synchronized by a synchronization circuit which responds to level transitions in a received pulse train and overrides the internal operation of the receiver clock to pull it into synchronism with the transmitter clock each time a level transitions in the receiver clock is out of phase with the corresponding level transitions of the transmitter clock as embodied in the pulse train. The two clocks of the data link are identical and can function either as master or as slave, depending on the direction of transmission.