发明名称 IMPROVEMENTS IN OR RELATING TO T.D.M. DATA TRANSMISSION SYSTEMS
摘要 A first number of system bits together with given information bits form a coherent block. The second number of different system bits consists of blank bits without any information meaning. At most the first sytem bits are used for frame synchronisation, and these system bits ensure the block position recognition and/or synchronisation of an error correction device. The first system redundant bits used for frame synchronisation form a coherent synchronisation word preceding the given information bits, and the synchronisation word position recognition is used for speed balancing in the total flow, when strict synchronisation between the sender and transmission fails. Then the number of blank bits is changed.
申请公布号 ZA7500577(B) 申请公布日期 1976.01.28
申请号 ZA19750000577 申请日期 1975.01.28
申请人 SIEMENS AG 发明人 REISINGER K;VOSS H
分类号 H04L1/00;H04J3/06;H04J3/07;H04J3/14;H04L5/22 主分类号 H04L1/00
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