| 摘要 |
<p>An improved integrated injection logic structure utilizes a current mirror in conjunction with each switching transistor (M1, M2) of the integrated injection logic circuit of this invention by connecting one of a plurality of collectors (O0, P0) of the switching transistor to the base of said switching transistor. In this manner, the current flowing through conducting switching transistors is limited by the current mirror. This limited current flow through conducting switching transistors, as well as the use of voltage pull up means (D1, D2) connected to the collectors of the switching transistors prevents the saturation of conducting switching transistors. This results in an increase in the voltage on the collectors of conducting switching transistors and a decrease in the voltage swing between a logical one and a logical zero, thereby substantially increasing the speed of the integrated injection logic circuit of this invention as compared to prior art integrated injection logic circuits. The voltage pull up means connected to the collectors of the switching transistors may comprise resistors or preferably forward biased Schottky diodes connected between a voltage source (Vdd) and the collectors of the switching transistors. This invention is also suitable for use in MOS circuits.</p> |
