发明名称 ERROR CORRECTING COMMUNICATION SYSTEM
摘要 PURPOSE:To improve the line efficiency by transmitting a burst signal from the transmission side without adding a postamble. CONSTITUTION:Error correction encoders 71a, 71b,...71i... encode transmission data 40 within periods assigned to them and transmit output data 43 and 43' through modulators 72a, 72b,...72i... as burst signals without the postamble which stores a part of transmission data and clears stored contents. At this time, error correction encoders 71a, 71b,...71i... are operated only during assigned periods and are stopped during periods other than them. Consequently, the last 6 bits of preceding transmission data 40 are stored in a shift register 41 till the next assigned burst time, and transmission bits are connected to the last of the preceding burst signal in the next assigned period and are encoded and are transmitted. Since contents in the preceding assigned burst signal period are stored for every burst signal in each memory area, a maximum likelihood estimating memory of every noticed burst is not broken by the other burst signals, and data is decoded continuously.
申请公布号 JPS60183839(A) 申请公布日期 1985.09.19
申请号 JP19840039864 申请日期 1984.03.02
申请人 NIPPON DENSHIN DENWA KOSHA;TOSHIBA KK 发明人 ATSUGI GAKUO;SUZUKI HIDEO;TAJIMA MASATO
分类号 H04L1/00;H03M13/05;H03M13/23;H04B7/15;H04J3/00 主分类号 H04L1/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利