发明名称 ARITHMETIC CIRCUIT OF LOGARITHM INFORMATION
摘要 PURPOSE:To attain the operation of a sum logarithm of the antilogarithm of plural logarithm information from these information, by combining a subtractor circuit, a data conversion circuit for logarithm area and an adder circuit to constitute an arithmetic circuit of logarithm information. CONSTITUTION:The value measured by a photometry circuit 8 is supplied to a CPU1 after A/D conversion through an A/D conversion circuit 12. When the apex value is obtained for all hitherto photometric quantities, the value N or M is obtained through subtraction between the apex value of the photometric quantity of this time only and that of the hitherto all photometric quantities. Then the value corresponding to log2(1+2**N) or log2(1+**M) is obtained and added to the larger one of both said apex values.
申请公布号 JPS60215239(A) 申请公布日期 1985.10.28
申请号 JP19850022691 申请日期 1985.02.06
申请人 MINOLTA CAMERA KK 发明人 YUASA YOSHIO
分类号 G06F7/556 主分类号 G06F7/556
代理机构 代理人
主权项
地址