发明名称 INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To produce a capacity element with less parasitic capacity by a method wherein, in an IC with a capacity element provided with a reverse conductive layer on one conductive Si substrate, a region not impressed with any potential connected to a conductive system is arranged between one of a pair of electrodes of a capacity element and a substrate. CONSTITUTION:An N layer 3 on a P type substrate 1 is separated by a P layer 4 and then another P layer 5 and an N layer 6 as well as an insulating film 7 and an electrode 8 are provided to form a capacity C9 by another insulating film 13 between the N layer 6 and the electrode 8 while the N layer 6 is provided with another electrode 12. At this time, a capacity C8 between the layers 6 and 5 due to a depletion layer and another capacity C7 between the layer 3 and the substrate 1 are formed in series by the P layer 5 and the N layer 3 not impressed with any forcible external potential and the P type substrate 1 impressed with the lowest potential on circuit to reduce the paracitic capacity between the electrode 12 and the lowest potential on circuit. The potential of P layer 5 and N layer 3 in case the substrate 1 and the electrode 12 are impressed with any voltage may be decided by dividing the capacity of impressed voltage. Besides, a diode D formed between the layers 3 and 5 may be made conductive depending upon the potential difference in both layers 5, 3.
申请公布号 JPS6184048(A) 申请公布日期 1986.04.28
申请号 JP19840206542 申请日期 1984.10.02
申请人 NEC CORP 发明人 ITO SOICHI
分类号 H01L27/04;H01L21/822;H01L27/08 主分类号 H01L27/04
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