发明名称 SCAN SYSTEM LOGICAL CIRCUIT
摘要 PURPOSE:To perform the dividing test of a scan-designed logical circuit easily and quickly by selecting each latch or detour of a shift register with a scan-out function by changing a switch and enabling the selected latches only to make scan. CONSTITUTION:Latches L1-Ln of the shift register with the scan-out function or the detours to bypass these are selected corresponding to selection changeover of switches S1-Sn. Accordingly, the selected latches only can make scan and the desired dividing test of the scan-designed logical circuit is performed easily and quickly.
申请公布号 JPS6199875(A) 申请公布日期 1986.05.17
申请号 JP19840221313 申请日期 1984.10.23
申请人 TOSHIBA CORP 发明人 TAKAGI HARUO
分类号 G01R31/28;G06F11/267 主分类号 G01R31/28
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