| 摘要 |
PURPOSE:To generate a remainder part of a code efficiently ahead an information part by constituting a linear shift register circuit based on the processing of a reciprocal polynomial of generation polynomial of a cyclic code. CONSTITUTION:The generation polynomial of an (n,k) cyclic code is taken as g(x) and its reciprocal polynomial is taken as g*(x). H* is defined Equation I and h*i is defined as Equation II. Let information vectors be Vk, Vk+1,-Vn-1 and a code polynomial I(x) corresponding to them is defined as Equation III. Coefficients of the I(x) are inputted to a delay element 1 with one time slot in the order of lower order (x) of terms with a switch SWS opened and processed by an algebraic coefficient device 2 and an algebraic adder 3. When the input of the Vn-1 is finished, the SWS is closed, the output SW is thrown to the position B to shift the circuit for m(=n-k) times. Then the output SW is thrown to the position A, the circuit is shifted by (k) times and the output vector of the circuit after n-shift in total is a code while using the g(x) displayed by (V0-Vk-Vn-1) as the generation polynomial.
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