发明名称 INSTRUCTION EXECUTION CONTROLLER
摘要 PURPOSE:To perform debugging in the instruction executing procedure of a hardware area by controlling the discontinuation of instruction for each operation viewed from the software side in a normal working mode even in case plural instructions of the hardware area are executed. CONSTITUTION:An instruction execution stop signal 7 is equal to 1 when an instruction debug mode FF4 of hardware instruction is set at 0 and an instruction execution mode FF3 of hardware area is set at 1 respectively. Then an instruction stop request signal 2 suppressed by an AND gate 6. While the AND of an AND gate 9 is released and an instruction stop request holding FF10 is set and the FF3 is equal to 0. Thus the AND of an AND gate 11 is released and an instruction stop signal 8 is equal to 1 and supplied to an instruction stop control unit 12. The unit 12 stops the instructions for each operation. Therefore the FF4 is set at 1 when an instruction of the hardware area is debugged, and the output instruction stop signal of an AND gate 5 is equal to 0. Thus the signal 2 is always reflected on the signal 8 via the gate 6.
申请公布号 JPS61194531(A) 申请公布日期 1986.08.28
申请号 JP19850034361 申请日期 1985.02.25
申请人 HITACHI LTD 发明人 NISHIYAMA TAKAAKI;NAGAI SEIJI;KAINO HIROMICHI
分类号 G06F11/28;G06F9/06;G06F9/22 主分类号 G06F11/28
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