| 摘要 |
PURPOSE:To clarify the time relations of the data obtained by a plurality of analytic units by adding means for measuring and storing the fetch intervals of inputted data and means for measuring and storing a time difference at a fetch stop time. CONSTITUTION:A logic analyzer having two state analyzer units 10 and 41 is provided with circuits 45 and 46 for measuring the time intervals of data 11 and 24 and memories 48 and 49 for storing the output of the circuits 45 and 46. Further, the logic analyzer is provided with another circuit 51 for measuring the time difference between fetch stop times for data memories 18 and 31. The logic analyzer is made function such that one of the two data memories is specified and the corresponding data in time concern in the other data memory are automatically specified. Therefore, the correspondence in time concern among the data in a plurality of state analyzer units which are operated by sampling clocks different from one another can be easily known and an analysis can be facilitated.
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