| 摘要 |
<p>A memory system includes a plurality of memory boards (10A-10C) each having a plurality of memory banks located thereon. Each memory bank includes a plurality of memory elements (20A). In page mode operation of the memory system, all the memory elements receive an active row address strobe signal, which is maintained active as long as page mode operation continues. Memory address information is decoded by board decoders (22) to select a memory board and by bank decoders (24A) to select a memory bank, thereby enabling the select memory elements to effect read or write operations in a page mode.</p> |
