| 摘要 |
PURPOSE:To transmit and receive the large quantity of the data at high speed by providing a common RAM connected accessibly from any information processing device as well through a communication line and a gate circuit to connect the common RAM only to one information processing device selected optionally. CONSTITUTION:When the data are transmitted from an equipment 1A to an equipment 2A, a common RAM 6 is connected to the equipment 1A beforehand, and the equipment 1A accesses a common RAM 6 through a communication line L and a gate circuit 7 as if the RAM 6 were the built-in RAM of the equipment 1A. When the need for data transmission from the equipment 1A to the equipment 1B occurs, the common RAM 6 is separated from the equipment 1A, simultaneously, the sending from the equipment 1A to a BUSY signal is stopped, the common RAM 6 is connected to the equipment 1B and a flag signal BUSY is sent from the equipment 1B to 1A. Consequently, at such a time, the large quantity of the data accommodated to the common RAM 6 are transmitted from the equipment 1A to the equipment 1B all at once.
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