发明名称 FAULT SUPERVISORY SYSTEM
摘要 PURPOSE:To attain fault supervision with high reliability and high functions with a few signal lines by using two adjacent processors to form a loopback and informing its power interruption information to a supervisory equipment if a fault is a power supply interruption. CONSTITUTION:The information relating to a fault generated in each processor 31 is informed to the supervisory equipment 32 via a master loop 33M by a token passing system. If a power interruption takes place in any interface section 34, the two processors adjacent to the said processor form a loopback from a master loop 33M to a slave loop 33S or from the slave loop 33S to the loop 33M to inform the occurrence of power failure to the supervisory equipment 32. Thus, the number of signal lines is decreased remarkably and more sophisticated fault supervision than a conventional system is attained.
申请公布号 JPS62299137(A) 申请公布日期 1987.12.26
申请号 JP19860141403 申请日期 1986.06.19
申请人 FUJITSU LTD 发明人 GOUKON KAZUHIKO;KAWAMATA TETSUO
分类号 H04M3/22 主分类号 H04M3/22
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