发明名称 ASHING METHOD
摘要 PURPOSE:To prevent the ashing irregularity of a semiconductor wafer generated by interference with ashing gas between lines, by providing slit grooves between lines of apertures arranged in the form of a line. CONSTITUTION:When a switching valve 9a opens, a switching valve 9b shuts, and an ashing gas flows out on the surface of a semiconductor wafer is mounted on a mounting stand 15, from apertures 6a, passing through gas introducing pipes 8 via a valve 9a, On the other hand, when the valve 9b opens, the valve 9a shuts, and the ashing gas flows out on the surface of the wafer 16 from the valve 9b. Thereby, interference with the ashing gas between the neighbouring apertures 6a and 6b can be prevented. In the case of interference of the ashing gas between lines of apertures of 6a and 6b arranged in the form of a line, the ashing irregularity of the semiconductor wafer 16 can be prevented by exhausting the gas via exhaust outlets 19 arranged in the silt grooves 18.
申请公布号 JPS63157422(A) 申请公布日期 1988.06.30
申请号 JP19860305944 申请日期 1986.12.22
申请人 TOKYO ELECTRON LTD 发明人 YOSHIOKA HARUHIKO;ONOE TERUHIKO
分类号 H01L21/302;H01L21/027;H01L21/3065 主分类号 H01L21/302
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