SEMICONDUCTOR PACKAGE

摘要

A semiconductor package includes a support substrate; a stress relaxation layer provided on a main surface of the support substrate; a semiconductor device located on the stress relaxation layer; an encapsulation material covering the semiconductor device, the encapsulation material being formed of an insulating material different from that of the stress relaxation layer; a line running through the encapsulation material and electrically connected to the semiconductor device; and an external terminal electrically connected to the line. Where the support substrate has an elastic modulus of A, the stress relaxation layer has an elastic modulus of B, and the encapsulation material has an elastic modulus of C under a same temperature condition, the relationship of A>C>B or C>A>B is obtained.

主权项

1. A method for manufacturing a semiconductor package, comprising:
forming a stress relaxation layer on and in contact with a main surface of a support substrate, forming at least one semiconductor device on the stress relaxation layer, covering the semiconductor device with an encapsulation material formed of an insulating material different from that of the stress relaxation layer, forming at least one line layer arranged on the encapsulation material and electrically connected to the semiconductor device via an opening in the encapsulation material; and forming at least one external terminal electrically connected to the line layer.