| 摘要 |
PURPOSE:To suppress the lowering in utilizing efficiency by assigning high-order bit of an input digital signal with respective to an input of less bit numbers when the bit number of the input digital signal is less than the input of a D/A converter. CONSTITUTION:When an input digital signal is 4 bits (A3-A0), switches 3a, 3b are changed over so that an input digital signal A5 is inputted to an input D1 of the D/A converter 1 and an input digital signal is inputted to an input D0. On the other hand, when the input digital signal is 6 bits, a low-order 2nd bit A1 of the input digital signal is inputted to the input D1 of the D/A converter 1 and a low-order 1st bit A0 of the input digital signal is inputted to the input D0 through the switching. Thus, the utilizing efficiency of the 6 bits and 4 bits is not different and the lowering in the utilizing efficiency is suppressed.
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