发明名称 MANUFACTURE OF WAFER INTEGRATED CIRCUIT
摘要 PURPOSE:To enable the reduction of wiring regions while securing yield of an integrated circuit, by dividing block wirings, which are positioned near circuit blocks, into pieces every circuit blocks and besides by using selective disposal of layer connections to perform wiring connections. CONSTITUTION:Concerning circuit blocks A to D, the following wirings are provided: transversal block wirings 21, 22 which are positioned near the circuit blocks and divided into pieces every circuit blocks, longitudinal block wirings 23 to 25 which are also formed so as to cross these wirings 21, 22 on the dissimilar layers, auxiliary wirings which are positioned on respective division points of the block wirings 21 to 25 and positioned so as to overlap their block wirings on the dissimilar layers, and circuit guide wirings 27 which are guided from respective external output terminals (a) to (d) and positioned to cross the block wirings 21 or 22 on the dissimilar layers. When the circuit blocks A and D, for example, are judged defective by tests for the circuit blocks A to D, points which need to be connected to each other in order to form desired circuit composition are selected from points where said respective wirings 21 to 27 are crossed or overlapped to each other, and next layer connections are performed through contact holes and so the desired circuit composition can be formed.
申请公布号 JPS63260055(A) 申请公布日期 1988.10.27
申请号 JP19870093918 申请日期 1987.04.16
申请人 FUJITSU LTD 发明人 KANASUGI AKINORI
分类号 H01L23/522;H01L21/768 主分类号 H01L23/522
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