发明名称 BIAS CIRCUIT
摘要 PURPOSE:To keep a bias voltage constant by using a current mirror circuit to cancel the change in a bias current due to the change in a power voltage. CONSTITUTION:A collector of a PNP transistor(TR) 7 of a current mirror circuit 10 is connected to a connecting point between an emitter of a TR Q3 and the 1st bias setting resistor Ra and the other terminal of the 1st bias setting resistor Ra is connected to a collector of an NPN TR 7' of a current mirror circuit 10'. A positive power voltage supply terminal 1 is connected to a connection point of resistors 2, 3 via a capacitor 9 and a resistor 8 connected in series, and a negative power voltage supply terminal 1' is connected to a connection point of resistors 2', 3' via a capacitor 9' and a resistor 8' connected in series. Thus, the change in a bias current IB due to the change in a power voltage Vcc is cancelled.
申请公布号 JPS63305605(A) 申请公布日期 1988.12.13
申请号 JP19870141809 申请日期 1987.06.05
申请人 ONKYO CORP 发明人 KASAI JOJI
分类号 H03F1/30;H03F3/20;H03F3/30 主分类号 H03F1/30
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