发明名称 Multistage digital signal multiplication and addition
摘要 Multistage digital signal multiplying and adding apparatus suitable for a multistage filter includes a plurality of addition stages each having adding devices for forming a succession of partial products together with selectors operable in a first condition to connect sum and carry outputs of the adding devices within a stage to further adding devices within the stage or a second condition to supply outputs to a further stage, the selectors being operable to change condition without resolving carry signals in one stage through all bit positions of that stage. The output of one stage is connected to a subsequent stage during a first cycle of product formation of the subsequent stage so that the output is accumulated with the first partial product of the subsequent stage.
申请公布号 US4920508(A) 申请公布日期 1990.04.24
申请号 US19870052249 申请日期 1987.05.19
申请人 INMOS LIMITED 发明人 YASSAIE, MOHAMAD H.;KING-SMITH, ANTHONY D.;DYSON, CLIVE M.
分类号 H03H15/00;G06F7/544;G06F17/10;H03H17/02 主分类号 H03H15/00
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