发明名称 ARITHMETIC SYSTEM
摘要 PURPOSE:To make it possible to execute operation for validating a carry input or a borrow input and operation for invalidating the carry input or the borrow input by the same specific code by providing this arithmetic system with a switching circuit. CONSTITUTION:Since an output 7 from a carry/borrow flag 2 and an output 8 from the switching circuit 1 are the same at the time of executing an ADC instruction or an SBC instruction in the '0' state of a control singal 10, the data of an arithmetic register 4, the data of a data latch circuit 5 and the contents of the flag 2 are added by an arithmetic logical operation circuit (ALU) 3 as an execution result. In the case of executing the ADC instruction in the '1' state of the control signal 10, the output 8 of the circuit 1 becomes '0', so that the data of the register 4 are added to the data of the circuit 5 as an execution result. In the case of executing the SBC instruction in the '1' state of the control signal 10, the output 8 of the circuit 1 becomes '1', so that the data of the circuit 5 are subtracted from the data of the register 4 as an execution result.
申请公布号 JPH05282133(A) 申请公布日期 1993.10.29
申请号 JP19920108825 申请日期 1992.04.01
申请人 发明人
分类号 G06F7/38;G06F7/508;G06F7/57;G06F9/305 主分类号 G06F7/38
代理机构 代理人
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