发明名称 PULSE WIDTH MODULATION WITH BYPASS MODE
摘要 For each phase line, a bypass mode capacitor is provided for providing a current path during a time gap when both active mode switches (S1,S3,S5) and freewheeling mode switches (S2,S4,S6) are open. Energy stored on the capacitors is discharged by resistors. The time gap and the bypass mode allow for easy control of the switches, with little power loss and noise on the output voltage.
申请公布号 CA2107490(A1) 申请公布日期 1994.04.03
申请号 CA19932107490 申请日期 1993.10.01
申请人 KISIL, PETER 发明人 ZIOGAS, PHOIVOS D. (DECEASED);VINCENTI, DONATO
分类号 H02J3/10;(IPC1-7):H02J3/10 主分类号 H02J3/10
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