发明名称 CLOCK RECOVERY UNIT
摘要 The clock restoration device in an ATM (Asynchronous Transfer Mode) network includes: a buffering means 1 for asynchronously writing by a write clock WCLK and receiving a read clock RCLK as the result to read out user's information in succession; a buffer controlling means 24 for continuously monitoring a state of the buffering means 1 and adjusting a count value such that a received service clock be kept between the upper and lower thresholds; a clock generating means 21; a first counting and comparing means 22 for inputting the output of the clock generating means 21 to generate a predetermined value; a second counting and comparing means 25 for inputting the output of the buffer controlling means 24 to generate a variable virtual time stamp TS at the transmitter; a triggering means 23 for triggering the clock output of the clock generating means 21 and outputting a service reference clock; and a DPLL means 3 for fixing the phase of the service reference clock output from the triggering means 23 and feeding it back to use it as a read clock of the buffering means 1.
申请公布号 KR960007673(B1) 申请公布日期 1996.06.08
申请号 KR19920026106 申请日期 1992.12.29
申请人 KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE;KOREA TELECOM 发明人 KIM, MYUNG - SUK;CHOE, KIL - YOUNG;KANG, TAE - WOON
分类号 H04L12/06;(IPC1-7):H04L12/56 主分类号 H04L12/06
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