发明名称 MEMORY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory circuit suitable for facilitating inspection of a semiconductor integrated circuit device where flip-flop circuits are mixed with latch circuits, and a semiconductor integrated circuit device for facilitating the inspection by providing the memory circuit. SOLUTION: The memory circuit LF comprises two latch circuits 10, 20. When a signal te from a switch terminal TE is low, switches S2, S3 are turned on while switches S1, S4 are turned off and the circuit LF functions as a latch circuit 20 for transmitting a data d from an input terminal D to an output terminal Q depending on the level of a signal g from a first clock terminal G through function of the latch circuit 20. When the signal te is high, the switches S2, S3 are turned off while the switches S1, S4 are turned on and the circuit LF functions as a D flip-flop receiving a data ti from the other input terminal T1 when latch circuits 10, 20 connected in series takes a data transmitting state/data holding state complementarily depending on the level of a signal ck from a second clock terminal CK.
申请公布号 JPH10197604(A) 申请公布日期 1998.07.31
申请号 JP19970002293 申请日期 1997.01.09
申请人 DENSO CORP 发明人 KAWASHIMA TAKESHI;FUKUMOTO HARUTSUGU;TANAKA HIROAKI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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