| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device and a PLL frequency synthesizer, in which a lock detecting circuit can be prevented from being fixed to a lock state, and an operation with abnormal frequencies can be prevented, even when the output of a reference signal is stopped at the time of the failure of a crystal oscillator. SOLUTION: A semiconductor integrated circuit device is provided with a lock-detecting circuit R and a reference clock generating circuit K which are provided in a PLL frequency synthesizer. The lock-detecting circuit R detects that the phase of a comparison signal fp obtained by frequency-dividing the frequency signal of a voltage control oscillator into set frequencies is locked to a reference signal fr, obtained by frequency-dividing an oscillator signal with prescribed frequencies into references based on a compared result signal S, obtained by comprising the phase of the reference signal fr with the phase of the comparison signal fp and the reference signal fr. The reference clock generating circuit K inputs the comparison signal fp and outputs the comparison signal fp as the reference signal for lock-detection to the lock-detecting circuit R, when the reference signal fr is stopped. |
