| 摘要 |
PROBLEM TO BE SOLVED: To provide the bit error measurement device where a time required for synchronization locking is reduced. SOLUTION: When a synchronization pattern detection section 24 detects a synchronization pattern from measured data, a discrimination timing control section 26 resets a data generating section 20, which outputs expected value data with a prescribed phase. A collation section 22 compares the expected value data with the measured data and a block synchronization discrimination section 28 counts a bit error signal outputted from the collation section 22, corresponding to a prescribed block. When the counted value is a prescribed threshold value or below, the block synchronization discrimination section 28 outputs a block synchronization establishment signal and a synchronization discrimination section 30 establishes synchronization. |
