Method for manufacturing a substrate for a polymer stud grid array
摘要
The polymer stud grid array has a 3-dimensional substrate (S) of an electrically insulating polymer, with a flat surface provided with polymer studs (PS), each having an external terminal (AA). Electrical conductor paths couple the external terminals to internal terminals (IA1), connected to the terminals of a semiconductor chip (C1) mounted on the substrate. Pref. the moulding and metallisation of the polymer studs is effected using moulded interconnection device technology, without requiring additional steps.
申请公布号
EP0971405(A2)
申请公布日期
2000.01.12
申请号
EP19990116980
申请日期
1995.09.22
申请人
SIEMENS S.A.;INTERUNIVERSITAIR MICRO-ELEKTRONICA CENTRUM VZW