| 摘要 |
<p>Methods and apparatus for performing a fast two-dimensional inverse discrete cosine transform (IDCT) in a media processor (1212) are disclosed. A processor (1212) receives at least one input component representing discrete cosine transform data and combines, in a first stage, the at least one input component with a first set of constants. In a media processor with partitioned SIMD architecture, the input data and first set of constants may be combined, for example, by multiplying the at least one input component with a first set of constants using a complex multiplication instruction. The output is transposed in a second stage and combined with constants in a third stage.</p> |
