发明名称 |
Semiconductor structures and fabrication methods thereof |
摘要 |
A method for forming a semiconductor structure including providing a substrate; forming a dielectric layer covering a surface of the substrate; forming a plurality of first through holes exposing the surface of the substrate by etching the dielectric layer; forming first conductive vias by filling the plurality of first through holes using a first metal material and first conductive lines on the first conductive vias also using the first metal material; forming a plurality of second through holes exposing the surface of the substrate by etching the dielectric layer; and forming second conductive vias by filling the plurality of second through holes using a second metal material, different from the first metal material, and second conductive lines over the second conductive vias also using the second metal material, wherein the second metal material has a different anti-electromigration ability from the first metal material. |
申请公布号 |
US9524933(B2) |
申请公布日期 |
2016.12.20 |
申请号 |
US201514848802 |
申请日期 |
2015.09.09 |
申请人 |
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION |
发明人 |
Zhang Haiyang;Zhang Chenglong |
分类号 |
H01L23/522;H01L23/532;H01L21/768 |
主分类号 |
H01L23/522 |
代理机构 |
Anova Law Group, PLLC |
代理人 |
Anova Law Group, PLLC |
主权项 |
1. A method for fabricating a semiconductor structure, comprising:
providing a substrate; forming a dielectric layer covering a surface of the substrate; forming a plurality of first through holes exposing the surface of the substrate by etching the dielectric layer using a first patterned mask layer; forming first conductive vias by filling the plurality of first through holes using a first metal material and forming first conductive lines over the first conductive vias also using the first metal material; forming a plurality of second through holes exposing the surface of the substrate by etching the dielectric layer using a second patterned mask layer; and forming second conductive vias by filling the plurality of second through holes using a second metal material, different from the first metal material, and forming second conductive lines over the second conductive vias also using the second metal material, wherein: the anti-electromigration ability of the second metal material is greater than the anti-electromigration ability of the first metal material; the first conductive vias and the first conductive lines are configured as signal lines of the semiconductor structure; and the second conductive vias and the second conductive lines are configured as power lines of the semiconductor structure. |
地址 |
Shanghai CN |