发明名称 RESIST PATTERN FORMING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To form resist patterns different in pattern density while keeping them high enough in lithography tolerance such as an exposure tolerance and a depth of focus. SOLUTION: After resist is applied on a substrate, a region where a logic with patterns arranged at random is formed is subjected to a first exposure process, using the interference of light penetrating through slit grooves 3 and 4 located on each side of the line of a pattern provided on a Levenson phase shift mask. The logic forming region and a region where a DRAM with repetitive patterns is formed are subjected to a second exposure process by the use of a photomask with a half tone part and a binary part and a 1/2 zonal lighting. A resist pattern is formed through an exposure process carried out twice.</p>
申请公布号 JP2001237173(A) 申请公布日期 2001.08.31
申请号 JP20000047604 申请日期 2000.02.24
申请人 SONY CORP 发明人 KIKUCHI KOJI
分类号 G03F1/30;G03F1/32;G03F1/68;G03F7/22;H01L21/027;H01L21/8242;H01L27/10;H01L27/108;(IPC1-7):H01L21/027;H01L21/824;G03F1/08 主分类号 G03F1/30
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