发明名称 FREQUENCY SYNTHESIZER
摘要 PROBLEM TO BE SOLVED: To provide a frequency synthesizer with a high rejection ratio of a spurious component. SOLUTION: In the frequency synthesizer 1 of this invention, when an integer frequency division value is changed to generate a fraction frequency division value, a round-off circuit 6 rounds off a random number generated by a random number generating circuit 7 and a frequency division control circuit 5 generates an integer frequency division value based on an integer generated as a result. Since the integer frequency division value is changed based on the random number, no regularity is caused and no spurious component takes place in an output signal OUT. Even when a compensation circuit 37 generates a compensation current and it is superimposed onto an output of a charge pump circuit 35, the effect of a ripple current outputted from the charge pump circuit 35 cannot completely be eliminated but since no regularity exists in the change in the integer frequency division value in the frequency synthesizer 1 of this invention, no spurious component takes place in the output signal OUT even in this case.
申请公布号 JP2001292061(A) 申请公布日期 2001.10.19
申请号 JP20000102964 申请日期 2000.04.05
申请人 TEXAS INSTR JAPAN LTD 发明人 ICHIMARU KOZO
分类号 H03L7/183;H03L7/089;H03L7/197 主分类号 H03L7/183
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