| 摘要 |
PURPOSE: A bit line contact of a semiconductor device is provided to prevent an error caused by a defect occurring during a write/read operation in a memory cell, by basically preventing an electrical short-circuit between a bit line contact plug and a storage electrode node. CONSTITUTION: A transistor is formed in a semiconductor substrate(40) including the first conductive region and the second conductive region. The first interlayer dielectric covers the semiconductor substrate. The first and second landing pads penetrate the first interlayer dielectric, electrically connected to the first and second conductive regions, respectively. The second interlayer dielectric is formed on the first interlayer dielectric. The bit line contact plug(46) penetrates the second interlayer dielectric, electrically contacting the first landing plug. The first sidewall spacer(45) is interposed between the bit line contact plug and the second interlayer dielectric, made of an insulation material. A bit line(47) is in contact with the upper surface of the bit line contact plug, formed on the second interlayer dielectric. The third interlayer dielectric is formed on the second interlayer dielectric to cover the bit line. The storage electrode node penetrates the third and second interlayer dielectrics, electrically connected to the second landing pad.
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