DRAM MEMORY CHANNEL SCRAMBLING/ECC DISASSOCIATED COMMUNICATION

摘要

A protocol that enables communication between a host and an Input/Output (I/O) channel storage device, such as a Dynamic Random Access Memory (DRAM) channel Dual In-Line Memory Module (DIMM) form-factor Solid State Drive (SSD), without the need to know or reverse engineer the encoding applied by the host. The control/status data are written to the storage device by sending a protocol training sequence of known values and storing the associated command/status data in the storage device in the same encoding format as that received from the host. These stored values are used at run time to execute encoded commands received from the host and to report status data to the host in the host-recognizable manner. A memory bank-based buffered configuration stores user data also in the as-received condition to preserve the host-specific encoding. This facilitates exchange of user data between the host memory controller and the storage device over the DRAM channel.

主权项

1. A method comprising:
detecting that a storage device is attached to Input/Output (I/O) interface supported by a host; in response to said detecting, instructing the host to write a first sequence of data patterns to the storage device using the I/O interface, wherein a data pattern in the first sequence includes an encoded version of a respective command data, and wherein the data pattern in the first sequence is written a pre-determined number of times before a next data pattern in the first sequence is written to the storage device; storing a command data-containing portion of the written data pattern in an addressable storage in the storage device; receiving, at the storage device, a control bit pattern from the host over the I/O interface, wherein the control bit pattern includes an encoded I/O command; and using one or more command data-containing portions in the addressable storage to decode the I/O command received through the control bit pattern.