| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock synchronization circuit that accurately synchronizes an external clock signal with an internal clock signal and adjusts the duty cycle of the internal clock signal up to 50%. SOLUTION: The lock synchronization circuit comprises; a clock synchronization control means for outputting a normal delay clock signal by delaying the external clock signal for a predetermined time, and outputting an additional delay clock signal by delaying the normal delay clock signal; a phase mixing means phases of the normal delay clock signal and the additional delay clock signal from the clock synchronization control means, and outputting an internal clock signal; a control means for controlling the operation of the phase mixing means, and determining a phase of the internal clock signal; a shift register for controlling a delay time of the clock synchronization means; and a phase detecting means for comparing a phase of the external clock signal with a phase of the internal clock signal and controlling the shift register according to the comparison result. |
