SiGe FINFET WITH IMPROVED JUNCTION DOPING CONTROL

摘要

A semiconductor device and a method for fabricating the device. The method includes: providing a FinFET having a source/drain region, at least one SiGe fin, a silicon substrate, a local oxide layer is formed on the silicon substrate, a gate structure is formed on the at least one SiGe fin and the local oxide layer, the gate structure is encapsulated by a gate hard mask and sidewall spacer layers; recessing the at least one SiGe fin in the source/drain region to the sidewall spacer layers and the silicon substrate layer; recessing the local oxide layer in the source/drain region to the sidewall spacer layer and the silicon substrate; growing a n-doped silicon layer on the silicon substrate; growing a p-doped silicon layer or p-doped SiGe layer on the n-doped silicon layer; and forming a silicide layer on the p-doped silicon layer or p-doped SiGe layer.

主权项

1. A method for fabricating a semiconductor device, the method comprising:
providing a FinFET having a source/drain region and at least one SiGe fin, wherein the at least one SiGe fin has sidewalls and is formed on a silicon substrate layer, a local oxide layer is formed on the silicon substrate layer, a gate structure is formed on the at least one SiGe fin and the local oxide layer, the gate structure is encapsulated by a gate hard mask and a plurality of sidewall spacer layers; recessing the at least one SiGe fin in the source/drain region, wherein the at least one SiGe fin is recessed to the plurality of sidewall spacer layers and the silicon substrate layer; recessing the local oxide layer in the source/drain region, wherein the local oxide layer is recessed to the plurality of sidewall spacer layers and the silicon substrate layer;