| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To verify packetized data in a communication circuit and to easily verify an asynchronous communication or inter-channel synchronism. <P>SOLUTION: A transmission signal (a) of a data producing circuit 101 and an expected value signal (a) of an expected value data producing circuit 121 are produced by the same data pattern. A header control signal produced by a header control circuit 102 is inputted to the data producing circuit 101 and a header producing circuit 103 to produce a transmission signal (b), and a header detecting signal obtained from a reception signal received via a transmission line is inputted to the expected value data producing circuit 121 and a header producing circuit 122 to produce an expected value signal (b) respectively. Therefore, the reception signal having the data pattern matched with that of the transmission signal (b) is compared with the expected value signal (b) and in the case of coincidence, synchronism can be confirmed. The header detecting signal of an adjacent channel is inputted to a data verifying circuit to confirm the synchronism of all a plurality of channels. <P>COPYRIGHT: (C)2003,JPO</p> |
