发明名称 Semiconductor device, electronic apparatus, and method of manufacturing semiconductor device
摘要 A semiconductor chip is mounted on a first surface of an interconnect substrate, and has a multilayer interconnect layer. A first inductor is formed over the multilayer interconnect layer, and a wiring axis direction thereof is directed in a horizontal direction to the interconnect substrate. A second inductor is formed on the multilayer interconnect layer, and a wiring axis direction thereof is directed in the horizontal direction to the interconnect substrate. The second inductor is opposite to the first inductor. A sealing resin seals at least the first surface of the interconnect substrate and the semiconductor chip. A groove is formed over the whole area of a portion that is positioned between the at least first inductor and the second inductor of a boundary surface of the multilayer interconnect layer and the sealing resin.
申请公布号 US9461103(B2) 申请公布日期 2016.10.04
申请号 US201414458709 申请日期 2014.08.13
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Miyagawa Yuichi;Fujii Hideki;Furuya Kenji
分类号 H01L23/02;H01L49/02;H01L21/56;H01L23/433;H01L23/522;H01L23/552;H01L23/48;H01L23/12;H01L23/28;H01L23/31;H01L23/00;H01L23/498;H01L23/50 主分类号 H01L23/02
代理机构 Young & Thompson 代理人 Young & Thompson
主权项 1. A semiconductor device comprising: a wiring substrate having a first surface and a second surface opposite to the first surface, a first side and a second side opposite the first side, a first electrode on the first surface and closer to the first side than to the second side, a second electrode on the first surface and closer to the second side than to the first side, a first group of external electrodes on the second surface and closer to the first side than to the second side in plan view, and a second group of external electrodes on the second surface and closer to the second side than to the first side in plan view; a first semiconductor chip having a first obverse surface, a first rear surface opposite the first obverse surface, a third side, a first inductor on the first obverse surface, and a first electrode pad on the first obverse surface, the first electrode pad being electrically connected with the first electrode of the wiring substrate via a first wire, and the first semiconductor chip being mounted on the wiring substrate such that the first rear surface faces the first surface of the wiring substrate; a second semiconductor chip having a second obverse surface, a second rear surface opposite the second obverse surface, a fourth side, a second inductor on the second obverse surface, and a second electrode pad on the second obverse surface, the second electrode pad being electrically connected with the second electrode of the wiring substrate via a second wire, and the second semiconductor chip being mounted side by side with the first semiconductor chip on the wiring substrate such that the second rear surface faces the first surface of the wiring substrate and such that the third side of the first semiconductor chip faces the fourth side of the second semiconductor chip; and a sealed resin body covering the first surface of the wiring substrate, the first semiconductor chip and the second semiconductor chip, wherein the first group of external electrodes comprises a first external electrode that is most proximate to the second side of the wiring substrate in the first group of external electrodes, wherein the second group of external electrodes comprises a second external electrode that is most proximate to the first side of the wiring substrate, in the second group of external electrodes, wherein no external electrode is arranged on the second surface of the wiring substrate that is not part of the first and second groups of external electrodes, and wherein a distance between the first external electrode and the second external electrode is greater than a distance between the third side of the first semiconductor chip and the fourth side of the second semiconductor chip in a direction from the first side of the wiring substrate to the second side of the wiring substrate.
地址 Kanagawa JP