发明名称 |
Test circuit for exposing higher order speed paths |
摘要 |
A test circuit for exposing higher order speed paths. A test circuit includes a clock generation circuit coupled to a test clock control unit. The clock generation circuit is configured to receive an input clock signal and to generate an output clock signal. The test clock control unit is configured to selectively provide a user programmable test vector or a fixed test vector to control the generation of the output clock signal by the clock generation circuit depending upon a state of a first mode select signal.
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申请公布号 |
US6671848(B1) |
申请公布日期 |
2003.12.30 |
申请号 |
US20010813339 |
申请日期 |
2001.03.20 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
MULIG JASON DALE;LOUIE ARNOLD |
分类号 |
G01R31/317;(IPC1-7):G01R31/28;G06F1/04;G06F11/00 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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