NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS ERASE VERIFICATION METHOD, IN WHICH JUDGEMENT ACCURACY OF THRESHOLD VOLTAGE IS IMPROVED

摘要

PURPOSE: A nonvolatile semiconductor memory device and its erase verification method are provided to enable to judge a threshold voltage of a cell transistor very accurately in an erase state, as suppressing the degradation of an erase verification operation speed. CONSTITUTION: A plurality of memory cell transistors(M1-M8) are connected to a NAND column serially in a current path. A plurality of word lines are connected to each gate of the plurality of memory cell transistors in the NAND column. A word line driving circuit(11) drives the plurality of word lines(WL1-WL8). A bit line is connected to one port of the NAND column by intervening a select gate transistor. A bit line driving circuit(13) drives the bit line. A source line is connected to another port of the NAND column by intervening a select gate transistor. A source line driving circuit(14) drives the source line. And a well potential supply circuit(15) supplies a potential to a semiconductor area where the plurality of memory cell transistors in the NAND column are formed.