发明名称 APPARATUS AND METHOD FOR ELIMINATING OFFSET OF PLL CIRCUIT, BY USING BINARY SIGNALS GENERATED FROM ENDEC MODULE, NOT RF SIGNALS FROM DISC
摘要 PURPOSE: An PLL(Phase Locked Loop) circuit offset eliminating apparatus and method is provided to prevent an elimination of the PLL circuit offset caused by using a poor disc, and to eliminate an PLL circuit offset as soon as a power is turned on irrespective of each operating step needed in regenerating RF signals. CONSTITUTION: The apparatus comprises an RF amplifier(103), an ENDEC(ENcode and DECode) module(111), a PLL circuit(113), and a switch(102). The RF amplifier(103) amplifies the RF signals acquired from a loaded disc. The ENDEC module(111) outputs binary signals if an offset elimination mode is set. The PLL circuit(113) eliminates an offset of the PLL by using the binary signals. The switch(102) transmits the binary signals to the PLL circuit(113) if the offset elimination mode is set, and sets a path for transmitting the signals, output from the RF amplifier, to the PLL circuit(113).
申请公布号 KR20050013437(A) 申请公布日期 2005.02.04
申请号 KR20030052092 申请日期 2003.07.28
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JO, SANG HYUN;KIM, SEUNG HOON
分类号 H03L7/06;(IPC1-7):G11B20/10 主分类号 H03L7/06
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