发明名称 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode
摘要 A semiconductor memory device is provided with a memory cell, at least one select gate transistor and a circuit. The circuit is configured to rewrite data in the memory cell by applying a potential difference between the gate and the source or between the gate and the drain, which is larger than a power supply voltage. The circuit operates in a first data programming mode and a second data programming mode. A first command or a first combination is used for the first data programming mode. A second command or a second command combination is used for the second data programming mode. The source line is set to different potentials between the first data programming mode and the second data programming mode, in a period when data is rewritten, by using the different command or the different command combination.
申请公布号 US6856544(B2) 申请公布日期 2005.02.15
申请号 US20030376847 申请日期 2003.02.28
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAKAMURA HIROSHI
分类号 G11C16/06;G11C16/10;(IPC1-7):G11C16/04 主分类号 G11C16/06
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