发明名称 MULTI-LAYER WIRING DEVICE, WIRING METHOD AND WIRING CHARACTERISTIC ANALYZING/PREDICTING METHOD
摘要 A method for wiring a multi-layer wiring device is provided to efficiently and systematically supply the first and second potentials to the wirings adjacent to each wiring layer by a through-hole contact. A plurality of wiring device blocks are disposed as a matrix type without overlapping a power wiring region or a signal wiring region between circuit blocks on a semiconductor chip. The first and second potential wirings connected to the first and second potential supply sources are commonly connected to the plurality of wiring device blocks through the first and second power lines. The signal lines extending between the plurality of wiring device blocks are coupled to each other through a connection wiring between the blocks. The signal lines extending over upper and lower wiring layers in the same wiring device block are coupled to each other through a contact wiring.
申请公布号 KR20050033055(A) 申请公布日期 2005.04.08
申请号 KR20050014210 申请日期 2005.02.21
申请人 SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH- 发明人 MASUDA, HIROO
分类号 H01L21/3205;H01L21/82;H01L21/822;H01L23/52;H01L23/522;H01L23/528;H01L27/04;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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