LOW POWER ELECTRONIC CALCULATOR SYSTEM

摘要

An electronic calculator system implemented in an MOS/LSI semiconductor chip having a data memory in the form of a sequentially-addressed array of memory cells, and timing masks are generated in a logic array which is interleaved with the sequential address lines of the data memory. A shift register for receiving a part of an instruction word for defining timing masks may be also interleaved with the sequential address lines. The logic array generates any one of a number of timing masks for controlling the gating of data into an arithmetic unit and other functions, dependent upon the instruction word.