| 摘要 |
A method and an apparatus for demodulating M-ary PSK signals of the type wherein the modulation is limited to phase transitions between adjacent phase states. The method is operative in a demodulator which comprises a phase splitter dividing a source signal into three paths with a preselected phase relationship among phases, one of the phases being delayed by nominally one bit period, a pair of mixers or multipliers, each one of the mixers receiving as one input a representation of the delayed-phase component and each one of the mixers receiving as a second input a representation of one of the other of the phase components. Combined signals are provided by the mixers to a combiner which adds or subtracts the combined signals according to expected input signal type to produce from one to N intermediate output signals. An intermediate output signal is coupled to a corresponding two-level comparator, each of which receives and responds to the respective intermediate output signals to produce a digital output. Digital logic circuitry responds to the digital outputs of each of the comparators to map the digital outputs into a single digital bit stream of ones and zeroes.
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