发明名称 SYSTEM CLOCK SWITCHING MECHANISM FOR MICROPROCESSOR
摘要 This system clock switching mechanism for a microprocessor has system clock specification data for the tasks in holding means such as a task control block (TDB). If there is no task in READY or RUN status, the clock switching control unit switches the system clock to the low speed clock. When the task is put in RUN status, the system clock specification data for that task in TDB is referred to so that the system clock is switched to the clock as specified.
申请公布号 CA2060853(A1) 申请公布日期 1992.08.09
申请号 CA19922060853 申请日期 1992.02.07
申请人 NEC CORPORATION 发明人 IDE, MOTOKI;KAI, TOSHIHARU
分类号 G06F1/06;G06F1/32;G06F9/22;G06F9/30;G06F9/46;(IPC1-7):G06F1/06;G06F1/08 主分类号 G06F1/06
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