| 摘要 |
A technique for reducing the undesirable effects of amplifier offset voltages in quantizers such as analog-to-digital converters and related devices. The quantizer of the invention has an array of input amplifiers for comparing an input signal with multiple reference voltages, an array of latches for registering output signals from the amplifiers, and signal summing circuitry connected between the amplifiers and the latches, to produce a set of modified amplifier outputs for input to the latches, each of the modified amplifier outputs being derived from a weighted sum of at least three amplifier outputs. In the event of a defect in one or more amplifiers causing unwanted amplifier offsets, the summing circuitry improves linearity without the need for paralleling of transistor components. In one embodiment of the invention, the summing circuitry includes a resistor ladder to which the amplifier outputs are connected and from which the modified outputs are derived. In another embodiment, the number of modified amplifier outputs is greater than the number of original amplifier outputs, and the summing circuitry also performs an interpolation function, reducing the number of input amplifiers needed to achieve a particular resolution.
|
