发明名称 ADAPTIVE SYSTEM BUS BANDWIDTH ALLOCATOR
摘要 <p>In a computing system, a programmable means for allocating use of a single system bus (4) for enhancing communications among a set of central processing units (CPUs) (1) and a set of bus masters (3), each of which is coupled to one or more system resources (5). Each bus master (3) comprises said programmable allocation means, which is denoted a gas pedal (19), and comprises a software programmable register (21) coupled to a throttle state machine (22) and to an idle state machine (23). Gas pedal (19) regulates the requests of associated bus master (3) for use of system bus (4). Embodiments of the present invention include a caching SCSI controller (60), a gas pedal (19) which comprises a scheduling prescaler (28), and a gas pedal (19) which is used in a scalable coprocessor (9).</p>
申请公布号 WO1993024889(A1) 申请公布日期 1993.12.09
申请号 JP1993000672 申请日期 1993.05.21
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