发明名称 Testing instrument for integrated semiconductor circuits
摘要 A testing instrument according to the invention contains an upper mounting plate for applying a multiplicity of integrated circuit units onto the upper surface of the upper mounting plate and having a multiplicity of pins which extend from the lower surface of the upper mounting plate, and a lower mounting plate for combination with the upper mounting plate by means of the pins, fitted into a multiplicity of grooves formed respectively in a multiplicity of supports which fit into the lower mounting plate, in which the pins are connected via connecting circuit conductors formed in the upper mounting plate to outer supply lines of the integrated circuit unit, and have greater separations in the lower position than in the upper position.
申请公布号 DE4433906(A1) 申请公布日期 1995.03.23
申请号 DE19944433906 申请日期 1994.09.22
申请人 SAMSUNG ELECTRONICS CO., LTD., SUWON, KR 发明人 LEE, JIN HYUK, SEOUL/SOUL, KR;KIM, KYUNG SUB, SEOUL/SOUL, KR;PARK, BUM YEUL, SEOUL/SOUL, KR
分类号 G01R31/26;G01R1/04;H01L21/66;H01R33/76;(IPC1-7):G01R31/28 主分类号 G01R31/26
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